1. Field of the Invention
This invention relates to instrumentation systems and, more particularly, to synchronizing instrumentation devices.
2. Description of the Related Art
Some instruments are devices that collect data or information from an environment or unit under test (UUT) and display this information to a user. An instrument may also analyze and process acquired data prior to displaying the data to the user. Some instruments provide test stimuli to a UUT. Examples of instruments include oscilloscopes, digital multimeters, pressure sensors, arbitrary waveform generators, digital waveform generators, etc. The information that may be collected by respective instruments includes information describing voltage, resistance, distance, velocity, pressure, frequency of oscillation, humidity, or temperature, among others.
Computer-based instrumentation systems typically include transducers for transducing a physical phenomenon into an electrical signal, signal conditioning logic to perform amplification, isolation, and/or filtering, and analog-to-digital (A/D) conversion logic for receiving analog signals and providing corresponding digital signals to the host computer system.
In a computer-based system, the instrumentation hardware or device is typically an expansion board plugged into one of the I/O slots of the computer system. In another common instrumentation system configuration, the instrumentation hardware is coupled to the computer system via other means such as through a VXI (VME eXtensions for Instrumentation) bus, a GPIB (General Purpose Interface Bus), a PXI (PCI eXtensions for Instrumentation) bus, a serial port or bus, or parallel port of the computer system. The instrumentation hardware may include a DAQ board, a computer-based instrument such as a multimeter, or another type of instrumentation device.
The instrumentation hardware may be configured and controlled by software executing on the computer system. The software for configuring and controlling the instrumentation system typically includes driver software and the instrumentation application software, or the application. The driver software serves to interface the instrumentation hardware to the application and is typically supplied by the manufacturer of the instrumentation hardware or by a third party software vendor. The application is typically developed by the user of the instrumentation system and is tailored to the particular function that the user intends the instrumentation system to perform. The instrumentation hardware manufacturer or third party software vendor sometimes supplies application software for applications that are common, generic, or straightforward.
Instrumentation driver software provides a high-level interface to the operations of the instrumentation device. The instrumentation driver software may operate to configure the instrumentation device for communication with the host system and to initialize hardware and software to a known state. The instrumentation driver software may also maintain a soft copy of the state of the instrument and initiated operations. Further, the instrumentation driver software communicates over the bus to move the device from state to state and to respond to device requests.
Some computerized instrumentation systems include several instrumentation and/or DAQ devices. Each device may generate and/or capture data based on a sample clock. For example, the sample clock on an arbitrary waveform generator may drive a DAC. Two or more devices may be considered to be digitally synchronized when their data capture and/or data generation circuits line up within a sample clock cycle. Digital synchronization may occur when the sample clocks of each device to be synchronized have substantially the same frequency (e.g., the devices' sample clocks may experience instantaneous frequency differences but, on average, the devices' sample clocks may not drift relative to each other). In addition, for digital synchronization, the devices to be synchronized are preferably able to respond to a trigger within the same sample clock period, and in the case of output devices, to output their data to a connector at substantially the same time. As described herein, two clocks are in phase when they are measured as having substantially the same frequency and substantially zero degrees of phase difference.
If the sample clock frequency for a set of devices is chosen to be an integer multiple of a reference clock signal received by all of the devices in that set, and if the frequency multiplier used within each device has substantially zero degrees of phase delay, then the devices in that set will have sample clocks that are synchronous to each other, subject to the tolerance of the reference signal, their layout, and the sample clock generation circuits used by each device. As such, a rising edge on the reference signal will correspond to a rising edge on each device's sample clock.
Even though choosing the sample clock frequency to be an integer multiple of a common reference signal may result in sample clocks that are in phase from device to device (subject to various component and routing tolerances), it may not necessarily achieve a desired type of synchronization (e.g., digital synchronization). For example, in order to achieve digital synchronization between a set of instrumentation devices, trigger conditions should preferably affect every device in the set on the same sample clock edge. If the frequency of the sample clock is too high to reliably pass a bussed signal from one device to another, the trigger signals may either be sent in a slower clock domain than that of the sample clock, such as the reference clock domain, or on a non-bussed means of sending the trigger signal (such as a point-to-point connection) may be used to send trigger signals.
In systems where the set of devices have sample clock frequencies that are not integer multiples of the sample clock frequency, achieving digital synchronization may be even more difficult. The reference clock signal seen by the devices in the set may have a low enough frequency that trigger signals clocked by the reference clock signal can be reliably passed from device to device. However, rising edges on the reference clock may not correspond to rising edges on the sample clock since the frequency of the sample clock is not an integer multiple of the reference clock. If the rising edges of the two clocks do not correspond (or if the phase relationship of sample clocks to the reference clock cannot be guaranteed), clocking trigger signals with the reference clock signal may ensure that devices of the same sample clock frequency will see a trigger at roughly the same time. However, clocking trigger signals with the reference clock signal may not ensure that two devices will see the trigger assertion in the same sample clock cycle.
To illustrate this point, assume two devices each include the simple circuit shown in FIG. 1 for trigger transfer from the reference clock domain to the sample clock domain. In FIG. 1, a first D flip-flop 10 receives a trigger input (e.g., from a bus connecting several instrumentation devices). D flip-flop 10 is clocked by the common reference signal (e.g., a 10 MHz signal). The output of D flip-flop 10, cTrig, is input to a second D flip-flop 12, which is clocked by each device's sample clock. The output of D flip-flop 12 is signal mTrig.
Even if the sample clocks of the two devices are in phase, FIG. 2 shows a timing diagram that illustrates why the trigger may not be seen in the same sample clock cycle on both devices. The output cTrig of the first flip-flop 10 may change too close to the rising edge of the sample clock, causing a setup violation because the input to the second flip-flop has not been stable for the necessary setup time. This setup violation causes the output mTrig of the second flip-flop 12 to be metastable. When the metastability finally settles, it may do so differently on each device, causing them to see the same transition in the trigger signal in different sample clock cycles. Thus, synchronization may be difficult when the sample clock frequency is not an integer multiple of the reference clock frequency.
As these examples show, it is desirable to be able to synchronize multiple devices in an instrumentation system, even if the devices use sample clocks whose frequencies are not integer multiples of a common reference frequency. For example, it is desirable to be able to have digitally synchronized instrumentation devices.